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34 unsigned int reserved:7;
35 unsigned int enable:1;
95 #define PCI_MODE2_ENABLE_REG 0xCF8
96 #define PCI_MODE2_FORWARD_REG 0xCFA
97 #define PCI_MODE1_ADDRESS_REG 0xCF8
98 #define PCI_MODE1_DATA_REG 0xCFC
99 #if defined(__alpha__) || defined(__sparc__)
100 #define PCI_EN 0x00000000
102 #define PCI_EN 0x80000000
104 #define MAX_DEV_PER_VENDOR_CFG1 32
105 #define BRIDGE_CLASS(x) (x == 0x06)
106 #define BRIDGE_PCI_CLASS(x) (x == 0x04)
107 #define BRIDGE_HOST_CLASS(x) (x == 0x00)
108 #define PCI_CLASS_PREHISTORIC 0x00
109 #define PCI_SUBCLASS_PREHISTORIC_VGA 0x01
110 #define PCI_CLASS_DISPLAY 0x03
111 #define PCI_SUBCLASS_DISPLAY_VGA 0x00
112 #define PCI_SUBCLASS_DISPLAY_XGA 0x01
113 #define PCI_SUBCLASS_DISPLAY_MISC 0x80
114 #define VIDEO_CLASS(b,s) \
115 (((b) == PCI_CLASS_PREHISTORIC && (s) == PCI_SUBCLASS_PREHISTORIC_VGA) || \
116 ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_VGA) ||\
117 ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_XGA) ||\
118 ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_MISC))
119 #define PCI_MULTIFUNC_DEV 0x80
120 #define MAX_PCI_DEVICES 64
121 #define PCI_MAXBUS 16
122 #define PCI_IS_MEM 0x00000001
123 #define MAX_PCI_ROM_SIZE (1024 * 1024 * 16)
125 #define IS_MEM32(x) ((x & 0x7) == 0 && x != 0)
126 #define IS_MEM64(x) ((x & 0x7) == 0x4)