libhd  5.0
regs.h
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1 /****************************************************************************
2 *
3 * Realmode X86 Emulator Library
4 *
5 * Copyright (C) 1996-1999 SciTech Software, Inc.
6 * Copyright (C) David Mosberger-Tang
7 * Copyright (C) 1999 Egbert Eich
8 *
9 * ========================================================================
10 *
11 * Permission to use, copy, modify, distribute, and sell this software and
12 * its documentation for any purpose is hereby granted without fee,
13 * provided that the above copyright notice appear in all copies and that
14 * both that copyright notice and this permission notice appear in
15 * supporting documentation, and that the name of the authors not be used
16 * in advertising or publicity pertaining to distribution of the software
17 * without specific, written prior permission. The authors makes no
18 * representations about the suitability of this software for any purpose.
19 * It is provided "as is" without express or implied warranty.
20 *
21 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
22 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
23 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
24 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
25 * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
26 * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
27 * PERFORMANCE OF THIS SOFTWARE.
28 *
29 * ========================================================================
30 *
31 * Language: ANSI C
32 * Environment: Any
33 * Developer: Kendall Bennett
34 *
35 * Description: Header file for x86 register definitions.
36 *
37 ****************************************************************************/
38 /* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.5 2003/10/22 20:03:05 tsi Exp $ */
39 
40 #ifndef __X86EMU_REGS_H
41 #define __X86EMU_REGS_H
42 
43 /*---------------------- Macros and type definitions ----------------------*/
44 
45 #ifdef PACK
46 # pragma PACK
47 #endif
48 
49 /*
50  * General EAX, EBX, ECX, EDX type registers. Note that for
51  * portability, and speed, the issue of byte swapping is not addressed
52  * in the registers. All registers are stored in the default format
53  * available on the host machine. The only critical issue is that the
54  * registers should line up EXACTLY in the same manner as they do in
55  * the 386. That is:
56  *
57  * EAX & 0xff === AL
58  * EAX & 0xffff == AX
59  *
60  * etc. The result is that alot of the calculations can then be
61  * done using the native instruction set fully.
62  */
63 
64 #ifdef __BIG_ENDIAN__
65 
66 typedef struct {
67  u32 e_reg;
68  } I32_reg_t;
69 
70 typedef struct {
71  u16 filler0, x_reg;
72  } I16_reg_t;
73 
74 typedef struct {
75  u8 filler0, filler1, h_reg, l_reg;
76  } I8_reg_t;
77 
78 #else /* !__BIG_ENDIAN__ */
79 
80 typedef struct {
82  } I32_reg_t;
83 
84 typedef struct {
86  } I16_reg_t;
87 
88 typedef struct {
89  u8 l_reg, h_reg;
90  } I8_reg_t;
91 
92 #endif /* BIG_ENDIAN */
93 
94 typedef union {
99 
102  };
103 
105 
109  };
110 
111 /*
112  * Segment registers here represent the 16 bit quantities
113  * CS, DS, ES, SS.
114  */
115 
117  u16 CS, DS, SS, ES, FS, GS;
118  };
119 
120 /* 8 bit registers */
121 #define R_AH gen.A.I8_reg.h_reg
122 #define R_AL gen.A.I8_reg.l_reg
123 #define R_BH gen.B.I8_reg.h_reg
124 #define R_BL gen.B.I8_reg.l_reg
125 #define R_CH gen.C.I8_reg.h_reg
126 #define R_CL gen.C.I8_reg.l_reg
127 #define R_DH gen.D.I8_reg.h_reg
128 #define R_DL gen.D.I8_reg.l_reg
129 
130 /* 16 bit registers */
131 #define R_AX gen.A.I16_reg.x_reg
132 #define R_BX gen.B.I16_reg.x_reg
133 #define R_CX gen.C.I16_reg.x_reg
134 #define R_DX gen.D.I16_reg.x_reg
135 
136 /* 32 bit extended registers */
137 #define R_EAX gen.A.I32_reg.e_reg
138 #define R_EBX gen.B.I32_reg.e_reg
139 #define R_ECX gen.C.I32_reg.e_reg
140 #define R_EDX gen.D.I32_reg.e_reg
141 
142 /* special registers */
143 #define R_SP spc.SP.I16_reg.x_reg
144 #define R_BP spc.BP.I16_reg.x_reg
145 #define R_SI spc.SI.I16_reg.x_reg
146 #define R_DI spc.DI.I16_reg.x_reg
147 #define R_IP spc.IP.I16_reg.x_reg
148 #define R_FLG spc.FLAGS
149 
150 /* special registers */
151 #define R_SP spc.SP.I16_reg.x_reg
152 #define R_BP spc.BP.I16_reg.x_reg
153 #define R_SI spc.SI.I16_reg.x_reg
154 #define R_DI spc.DI.I16_reg.x_reg
155 #define R_IP spc.IP.I16_reg.x_reg
156 #define R_FLG spc.FLAGS
157 
158 /* special registers */
159 #define R_ESP spc.SP.I32_reg.e_reg
160 #define R_EBP spc.BP.I32_reg.e_reg
161 #define R_ESI spc.SI.I32_reg.e_reg
162 #define R_EDI spc.DI.I32_reg.e_reg
163 #define R_EIP spc.IP.I32_reg.e_reg
164 #define R_EFLG spc.FLAGS
165 
166 /* segment registers */
167 #define R_CS seg.CS
168 #define R_DS seg.DS
169 #define R_SS seg.SS
170 #define R_ES seg.ES
171 #define R_FS seg.FS
172 #define R_GS seg.GS
173 
174 /* flag conditions */
175 #define FB_CF 0x0001 /* CARRY flag */
176 #define FB_PF 0x0004 /* PARITY flag */
177 #define FB_AF 0x0010 /* AUX flag */
178 #define FB_ZF 0x0040 /* ZERO flag */
179 #define FB_SF 0x0080 /* SIGN flag */
180 #define FB_TF 0x0100 /* TRAP flag */
181 #define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
182 #define FB_DF 0x0400 /* DIR flag */
183 #define FB_OF 0x0800 /* OVERFLOW flag */
184 
185 /* 80286 and above always have bit#1 set */
186 #define F_ALWAYS_ON (0x0002) /* flag bits always on */
187 
188 /*
189  * Define a mask for only those flag bits we will ever pass back
190  * (via PUSHF)
191  */
192 #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
193 
194 /* following bits masked in to a 16bit quantity */
195 
196 #define F_CF 0x0001 /* CARRY flag */
197 #define F_PF 0x0004 /* PARITY flag */
198 #define F_AF 0x0010 /* AUX flag */
199 #define F_ZF 0x0040 /* ZERO flag */
200 #define F_SF 0x0080 /* SIGN flag */
201 #define F_TF 0x0100 /* TRAP flag */
202 #define F_IF 0x0200 /* INTERRUPT ENABLE flag */
203 #define F_DF 0x0400 /* DIR flag */
204 #define F_OF 0x0800 /* OVERFLOW flag */
205 
206 #define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
207 #define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
208 #define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
209 #define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
210 #define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
211 
212 #define CONDITIONAL_SET_FLAG(COND,FLAG) \
213  if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
214 
215 #define F_PF_CALC 0x010000 /* PARITY flag has been calced */
216 #define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
217 #define F_SF_CALC 0x040000 /* SIGN flag has been calced */
218 
219 #define F_ALL_CALC 0xff0000 /* All have been calced */
220 
221 /*
222  * Emulator machine state.
223  * Segment usage control.
224  */
225 #define SYSMODE_SEG_DS_SS 0x00000001
226 #define SYSMODE_SEGOVR_CS 0x00000002
227 #define SYSMODE_SEGOVR_DS 0x00000004
228 #define SYSMODE_SEGOVR_ES 0x00000008
229 #define SYSMODE_SEGOVR_FS 0x00000010
230 #define SYSMODE_SEGOVR_GS 0x00000020
231 #define SYSMODE_SEGOVR_SS 0x00000040
232 #define SYSMODE_PREFIX_REPE 0x00000080
233 #define SYSMODE_PREFIX_REPNE 0x00000100
234 #define SYSMODE_PREFIX_DATA 0x00000200
235 #define SYSMODE_PREFIX_ADDR 0x00000400
236 #define SYSMODE_INTR_PENDING 0x10000000
237 #define SYSMODE_EXTRN_INTR 0x20000000
238 #define SYSMODE_HALTED 0x40000000
239 
240 #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
241  SYSMODE_SEGOVR_CS | \
242  SYSMODE_SEGOVR_DS | \
243  SYSMODE_SEGOVR_ES | \
244  SYSMODE_SEGOVR_FS | \
245  SYSMODE_SEGOVR_GS | \
246  SYSMODE_SEGOVR_SS)
247 #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
248  SYSMODE_SEGOVR_CS | \
249  SYSMODE_SEGOVR_DS | \
250  SYSMODE_SEGOVR_ES | \
251  SYSMODE_SEGOVR_FS | \
252  SYSMODE_SEGOVR_GS | \
253  SYSMODE_SEGOVR_SS | \
254  SYSMODE_PREFIX_DATA | \
255  SYSMODE_PREFIX_ADDR)
256 
257 #define INTR_SYNCH 0x1
258 #define INTR_ASYNCH 0x2
259 #define INTR_HALTED 0x4
260 
261 typedef struct {
262  struct i386_general_regs gen;
263  struct i386_special_regs spc;
264  struct i386_segment_regs seg;
265  /*
266  * MODE contains information on:
267  * REPE prefix 2 bits repe,repne
268  * SEGMENT overrides 5 bits normal,DS,SS,CS,ES
269  * Delayed flag set 3 bits (zero, signed, parity)
270  * reserved 6 bits
271  * interrupt # 8 bits instruction raised interrupt
272  * BIOS video segregs 4 bits
273  * Interrupt Pending 1 bits
274  * Extern interrupt 1 bits
275  * Halted 1 bits
276  */
278  volatile int intr; /* mask of pending interrupts */
279  int debug;
280 #ifdef DEBUG
281  int check;
282  u16 saved_ip;
283  u16 saved_cs;
284  int enc_pos;
285  int enc_str_pos;
286  char decode_buf[32]; /* encoded byte stream */
287  char decoded_buf[256]; /* disassembled strings */
288 #endif
290  u8 __pad[3];
291  } X86EMU_regs;
292 
293 /****************************************************************************
294 REMARKS:
295 Structure maintaining the emulator machine state.
296 
297 MEMBERS:
298 mem_base - Base real mode memory for the emulator
299 mem_size - Size of the real mode memory block for the emulator
300 private - private data pointer
301 x86 - X86 registers
302 ****************************************************************************/
303 typedef struct {
304  unsigned long mem_base;
305  unsigned long mem_size;
306  void* private;
308  } X86EMU_sysEnv;
309 
310 #ifdef END_PACK
311 # pragma END_PACK
312 #endif
313 
314 /*----------------------------- Global Variables --------------------------*/
315 
316 #ifdef __cplusplus
317 extern "C" { /* Use "C" linkage when in C++ mode */
318 #endif
319 
320 /* Global emulator machine state.
321  *
322  * We keep it global to avoid pointer dereferences in the code for speed.
323  */
324 
326 #define M _X86EMU_env
327 
328 /*-------------------------- Function Prototypes --------------------------*/
329 
330 /* Function to log information at runtime */
331 
332 void printk(const char *fmt, ...);
333 
334 #ifdef __cplusplus
335 } /* End of "C" linkage for C++ */
336 #endif
337 
338 #endif /* __X86EMU_REGS_H */